Yesterday I only had a little over an hour to work on the second NAND2Tetris project, but I finished my design for the arithmetic logical unit (ALU)! Woohoo! Unfortunately, it wasn’t working, so today I’ll try to fix it.
Arithmetic logical unit: take two!
So, where did I leave off… That’s right, I was looking at the truth table provided in chapter 2 of The Elements of Computing Systems (PDF), which specifies that if all control bits are set to 1, then the output should be 1. My ALU gave the ouput 0. That’s a problem. But the bigger problem is that I’m not sure I understand the specifications!
A few minutes later: OK, I do understand the specifications, after all. That’s good news. I checked my understanding on paper and confirmed that if all the control bits are 1, then the final output should be a 16-bit representaion of the number 1. So why isn’t my ALU doing that?
I checked my HDL while following along with the schematic diagram I drew, one step at a time, and then I found it: my pipes were crossed again! I forgot to connect one set of outputs to the next set of inputs, instead using the original inputs. Oops!
Let’s reload the script and try this again. Fingers crossed. Drum roll, please…
End of script - Comparison ended successfully
Yes!!! Success!!! I have a working arithmetic logical unit! But this is only part of it; next, I need to implement the extra “status outputs”: one to tell me if the output is exactly zero, and one to tell me if the output is less than zero. I wonder what those status outputs are going to be used for later…
So, the questions I need to ask myself for this next part of the design are:
- How do I check if a number is zero using my existing logic gates?
- How do I check if a number is negative (according to the two’s complement method)? In other words, how do I check if the number’s most signigicant bit is 1?
- Finish building the second project.
- Study time: 45 min
- Building project 2: 45 min
- Learn to Code LA workshop prep: 3 hours