Today I spent a good chunk of time working on some Learn to Code LA stuff, which includes preparing for our one-year anniversary party and planning for a talk that I’m giving in February.
But what I’m really excited about working on today is designing my first RAM chip and finishing the third NAND2Tetris project!
Unfortunately, I probably won’t get very far with this until next week, because I’m spending the next four days at the Southern California Linux Expo (SCaLE), the “largest community-run open-source and free software conference in North America”! This will be my first real tech conference, so I’m super excited!
Designing my first RAM chip
I already did all the reading and implemented a single-bit and 16-bit register yesterday, so next up is the RAM! I’ll start with a 16-bit 8-register RAM and then I guess I just chain them together to make larger versions.
So, where do I start? Let’s look at the chip specifications. One 16-bit output and three inputs: a 16-bit data input, a single-bit load input, and a 3-bit address input.
And what does this thing do? I’m just reading the specs and writing them in my own words: when the load bit is set to 1, then the RAM should take the 16-bit data input and write it to the register specified by the address input. And the RAM should always output the data stored in the register specified by the address input.
As an aside: I am amazed that I’m already designing computer memory, just 3 weeks into this course! This is so cool!
OK, now let’s get to work. I’m going to sketch some ideas on paper. The most obvious first task will be to connect a bunch of registers together – 8 of them for this first RAM chip.
A few minutes later: The real magic is in choosing the appropriate register based on the address. Time to use a mux or demux! My first sketch was utter nonsense, but it helped me realize that I need to run the load input through a switch; otherwise, my RAM would overwite every register and that’s not what I want!
Since I have one load input and a bunch of registers to choose from, I must need a demux this time! Woohoo, this will be the first time I get to use a demux!
This is an interesting way to teach: have the students create a bunch of building blocks without knowing exactly when they’ll come in handy. It is rather satisfying to discover that on my own, even if it does feel sort of backwards.
A few minutes later: Wow, it works! Got it on the first try! Aw, I’m almost a bit disappointed that this was so easy.
RAM, but more bigger!
OK, onto the next task: a 16-bit 64-register RAM chip. I guess I can just chain together 8 of my RAM8 chips for this. Let’s sketch!
Ah, but here’s the catch: now I’m using a 6-bit address input and I need a way to not only select which 8-register RAM chip I want, but I also need to select a register within that RAM chip! Hmm, I will have to give this some thought.
Something about counting in binary seems like it will be important here… The first RAM chip would contain the registers with address numbers 0 to 7 (or in this 6-bit binary system, 000000 to 000111). The last of the 8 RAM chips would contain registers with address numbers 56 to 63 (111000 to 111111). Filling out part of the middle sections of this sequence, I see a convenient pattern: the first three bits can represent the RAM and the last three bits can represent the registers within the given RAM!
OK, I think I have a solution now. I just need to break up the address input into two sections and feed them in to my mux and demux accordingly, so the design should look very much like the RAM8 chip.
And… success! Woohoo! I’m having a good day. It worked on the first try, once again! OK, I need to stop for now. I’ll be celebrating this tiny victory while I pick up my friend from the airport.
Learning summary (#TIL)
- I successfully designed my first RAM chip and then chained a bunch of them together to build a 16-bit 64-register RAM!
- Finish the third project by designing even larger RAM chips and a 16-bit program counter.
- Study time: 45 min
- Building third project: 45 min
- Learn to Code LA planning: 3 hours